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‘NAND flash could go higher than 600 layers’: SK hynix CEO

Executive unveils tech road map for memory industry at global forum

By Song Su-hyun

Published : March 22, 2021 - 17:52

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SK hynix CEO Lee Seok-hee delivers a keynote speech at the IEEE International Reliability Physics Symposium on Monday. (SK hynix) SK hynix CEO Lee Seok-hee delivers a keynote speech at the IEEE International Reliability Physics Symposium on Monday. (SK hynix)


NAND flash chips could have more than 600 layers as memory technologies evolve, SK hynix CEO Lee Seok-hee said at a global forum on Monday.

During a keynote speech at the International Reliability Physics Symposium hosted by Institute of Electrical and Electronics Engineers, Lee said, “In both DRAM and NAND areas, the company is working to improve not only materials of memory semiconductors but also design structures and reliability to raise the technological value.”

“If current efforts turn out successfully, we will be able to scale DRAM chips below 10-nanometer process and stack NAND more than 600 layers,” the CEO said.

The most advanced NAND flash memory to date has 176 layers and is developed by US-based Micron.

SK hynix became the second to develop the 176-layer chip last year and plans to start its mass production this year, earlier than cross-town archrival Samsung Electronics.

Lee’s comment on the 600-layer chip shows the company’s commitment to, and confidence in, leading the global NAND sector.

SK hynix, which last year acquired Intel’s NAND business, faces three major tasks: Securing high aspect ratio contact etch technology, securing cell dielectric characteristic and solving film stress issues.

The chipmaker is on track to improve structures of its HARC etch technology to be able to stack more layers for NAND. It has also adopted the atomic layer deposition technology to secure the cell dielectric characteristic, according to the chief. For the film stress issue, the company is trying to optimize the cell oxide and nitride material.

Reliability is also a new key factor for memory chips, as the role of memory is expanding in the era of digital transformation, he said.

“So far, high density, high speed, low power was required to satisfy the needs of various applications and customers,” Lee said. “But now on top of those requirements, high reliability is required in growing markets for smart ICT technology such as autonomous cars and smart health care where the components were expected to run for long period of time under extreme conditions.”

To overcome limitations of memory performance in the next 10 years and beyond, there will be an era of convergence where memory chips are converged with system chips like central processing units, he said.

“The concept is to add a few computing functions of CPU to DRAM,“ he said.

By introducing SK Group’s Financial Story, the pan-group management initiative focused on environmental, social and governance issues, Lee said SK hynix is committed to addressing social problems.

If hard disk drives are replaced with low-power solid state drives, we can reduce carbon emissions by 93 percent, he said.

“If the HDDs at data centers around the world are replaced with SSDs, the world could cut 41 million tons of carbon emissions by 2030,” the CEO said. “SK hynix will continue introducing solutions that help reduce energy use while offering better computing performances.”

By Song Su-hyun (song@heraldcorp.com)